From the fully automatic coffee machine to the central processing units, electronic circuits and computer chips enhance the quality of our daily life. Since these circuits consist of millions of network elements, like resistors, capacitors, inductors and transistors, chip design relies strongly on circuit simulation. The computed electric behavior is used by the designer to rate and validate new developements before production.

Miniaturization of single elements and ultra high integration is the ongoing trend to enhance the performance of all electronic devices. It leads to smaller devices driven by higher frequencies and smaller signals and overall it leads from micro- to nanotechnolgy.

In turn, modern circuit simulators have to face several challenges: higher packing densities result in larger systems with increased power density, and smaller signals result in larger noise/signal ratio and thus stronger influence of parasitic effects, which could have been neglected before.

This leads to our ongoing research in the field of circuit simulation:

• Speed up of circuit simulation by identification of active and latent parts in electric circuits (Multirate)
• Model Order Reduction for parasitic circuits
• Coupling of circuit simulators with distributed device models (Dynamic Iteration, Semiconductors, Electromagnetic Field Devices)